1. Field of the Invention
The present invention relates to the field of signal processing, and in particular, to signal processing in a partial-response (PRML) read channel.
2. Background Art
Communication of voice and data signals is often accomplished by converting analog signals to digital signals. These digital signals are then transmitted from a transmitting device to a receiving device, converted back to analog, if necessary, and communicated to a user. This digital transmission is often performed through analog channels. Digital information is transmitted in the form of a "symbol" representing a digital value. In some cases, adjacent symbols can overlap, resulting in a phenomenon known as intersymbol interference. This interference can corrupt a digital transmission, leading to errors in the receipt of the digital information.
Using partial response signaling allows a better handling of intersymbol interference as well as a more efficient utilization of the bandwidth of a given channel. In partial response systems, a controlled amount of intersymbol interference can be allowed.
However, a precoding is often performed to take a full advantage of partial response signaling, and a method for decoding the binary symbol sequence that is outputted from the channel in its corrupted form is required. For example, in a magnetic recording channel, maximum likelihood sequence estimation (MLSE) decoding in conjunction with partial response signaling systems can be used as an effective tool in pulse detectors for receiving and decoding digital transmissions that suffer from intersymbol interference.
FIG. 1 is the block diagram of a prior art read channel monitor system using the MSE (Mean Square Error) technique for PRML (Partial Response Maximum Likelihood) systems. Since PRML read channel systems are usually implemented in analog circuitry, the MSE signal of the input data samples is also analog. The analog MSE implementation shown in FIG. 1 for a PRML sampled read channel comprises differential subtractor 105 and gain stage 107 to obtain the difference between equalizer 101 output and the target Viterbi sampled value 103. An analog multiplier 109 coupled to gain stage 107 performs the squaring of the error signal.
The outputs of multiplier 109 are fed to an on-chip integrator 111 to obtain an analog MSE signal. The differential analog MSE signal is then brought off-chip via a differential analog output buffer 113 to an off-chip filter 115. The filtered MSE signal goes through a differential to single-ended analog conversion before digitized by the servo A/D and further processing by DSP microprocessor 119.
This prior art solution, however, is prone to error due to poor signal-to-noise ratio (SNR) caused by the small voltage difference between the sample and the target value, typically down to a few mV's as the data samples come close to the target. The analog summing and multiplying stages also add a fair amount of noise and offset to the MSE signal, making it difficult to filter. The long analog MSE signal path is also susceptible to degradation from other on-chip noise sources such as clocks and digital CMOS lines.
Further, the SNR of the analog MSE decreases as the channel approaches ideal equalization, which prevents the users to obtain the optimal settings. Bench experiments using an SSI 4910 PRML channel, manufactured by Silicon Systems, Inc., Tustin, Calif., indicates that the MSE method has relatively low sensitivity and does not provide a single optimum solution for the continuous time filter cutoff and boost as shown in FIG. 2.
FIG. 2 shows mean square error MSE as a function of bandwidth and gain. It is clear that there are multiple combinations of continuous time filter 115 cutoff frequency and gain stage 107 boost that yields lower MSE values. For example, at bandwidth 32 MHz, gain boost of 10 dB yields 9-10% MSE, which is also observed at bandwidth 29 MHz and gain boost of 7 dB. As can be inferred from FIG. 1, this analog MSE solution is hardware-intensive with both on-chip and off-chip components.
An alternative approach is to use a high-resolution analog-to-digital converter (ADC) to quantize the incoming signal, and perform digital operations of summing, multiplying, and averaging using hardware. This, however, is also a hardware-intensive solution, especially with the need for a high resolution ADC.
Viterbi Threshold Marginalization technique can be used to optimize the PRML read channel, as suggested by Z. Keirn, et al. in "A Window-Margin Like Procedure . . . ", IEEE Tran. on Magnetics, March 1995. Using this technique, the Viterbi threshold can be increased about 50% to marginalize the channel performance, and optimize the channel for 10.sup.-6 BER (bit Error rate) performance by mapping the BER contours with respect to the parameters in question as shown in FIG. 3. The optimized setting maps to a 10.sup.-9 range BER once the Viterbi threshold is returned to normal. The lower BER target reduces the tuning time of the hard disk drive, resulting in cost reduction in manufacturing.
However, this method interferes with the normal operation of the channel, and requires external custom software and hardware to process the data. It is also known that Viterbi marginalization is not always linear with respect to the channel BER, and does not always map to the lowest MSE and BER.
Another channel marginalization technique is to add white Gausian noise to the input signal, degrading the input SNR. The method is used in some advanced PRML systems by summing in the output from a programmable noise generator before the equalization step as shown in FIG. 4. By adding noise to the system and optimizing for a 10.sup.-6 range BER, the drive tune time can be reduced. The noise generator, however, disturbs the normal analog signal path and the operation of the read channel, and may not have a one-to-one mapping once the noise source is removed from the read channel.
Further, in this noise generator method, the summing circuit and the noise generator can be a source of error themselves, and may degrade the performance of the channel during normal operations. Additional external hardware and software are also required to extract the BER information from the raw channel output data, similar to Viterbi threshold marginalization.
Alternatively, the MSE of the sampled data can be used in combination with the noise generator for optimization. But again, the drawbacks of the analog MSE are the limiting factor for such a system.